MC9S12KG128 Datasheet, PDF (334/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 10 Serial Communications Interface (SCIV1)
10.3.2.5 SCI Status Register 2 (SCISR2)
Module Base + 0x_0005
7
6
5
4
3
2
1
0
R
0
0
0
0
0
RAF
BK13
TXDIR
W
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 10-7. SCI Status Register 2 (SCISR2)
Read: Anytime
Write: Anytime; writing accesses SCI status register 2; writing to any bits except TXDIR and BRK13
(SCISR2[1] & [2]) has no effect
Table 10-6. SCISR2 Field Descriptions
Field
2
BK13
1
TXDIR
0
RAF
Description
Break Transmit Character Length — This bit determines whether the transmit break character is 10 or 11 bit
respectively 13 or 14 bits long. The detection of a framing error is not affected by this bit.
0 Break Character is 10 or 11 bit long
1 Break character is 13 or 14 bit long
Transmitter Pin Data Direction in Single-Wire Mode. — This bit determines whether the TXD pin is going to
be used as an input or output, in the Single-Wire mode of operation. This bit is only relevant in the Single-Wire
mode of operation.
0 TXD pin to be used as an input in Single-Wire mode
1 TXD pin to be used as an output in Single-Wire mode
Receiver Active Flag — RAF is set when the receiver detects a logic 0 during the RT1 time period of the start
bit search. RAF is cleared when the receiver detects an idle character.
0 No reception in progress
1 Reception in progress
MC9S12KG128 Data Sheet, Rev. 1.15
334
Freescale Semiconductor