MC9S12KG128 Datasheet, PDF (237/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV1)
7.3.2.10 ATD Status Register 2 (ATDSTAT2)
This read-only register contains the Conversion Complete Flags CCF15 to CCF8.
Module Base + 0x000A
R
W
Reset
7
CCF15
0
6
CCF14
5
CCF13
4
CCF12
3
CCF11
2
CCF10
0
0
0
0
0
= Unimplemented or Reserved
Figure 7-12. ATD Status Register 2 (ATDSTAT2)
Read: Anytime
Write: Anytime, no effect
Table 7-20. ATDSTAT2 Field Descriptions
1
CCF9
0
0
CCF8
0
Field
Description
7–0
CCF[15:8]
Conversion Complete Flag x (x = 15, 14, 13, 12, 11, 10, 9, 8) — A conversion complete flag is set at the end
of each conversion in a conversion sequence. The flags are associated with the conversion position in a
sequence (and also the result register number). Therefore, CCF8 is set when the ninth conversion in a sequence
is complete and the result is available in result register ATDDR8; CCF9 is set when the tenth conversion in a
sequence is complete and the result is available in ATDDR9, and so forth. A flag CCFx (x = 15, 14, 13, 12, 11,
10, 9, 8) is cleared when one of the following occurs:
A) Write to ATDCTL5 (a new conversion sequence is started)
B) If AFFC = 0 and read of ATDSTAT2 followed by read of result register ATDDRx
C) If AFFC = 1 and read of result register ATDDRx
0 Conversion number x not completed
1 Conversion number x has completed, result ready in ATDDRx
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
237