MC9S12KG128 Datasheet, PDF (582/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Appendix A Electrical Characteristics
A.7.1.5 Pseudo Stop and Wait Recovery
The recovery from Pseudo STOP and Wait are essentially the same since the oscillator was not stopped in
both modes. The controller can be woken up by internal or external interrupts. After t_wrs the CPU starts
fetching the interrupt vector.
A.7.2 Oscillator
The device features an internal low-power loop controlled Pierce oscillator and a full swing Pierce
oscillator/external clock mode. The selection of loop controlled Pierce oscillator or full swing Pierce
oscillator/external clock depends on the XCLKS signal which is sampled during reset. Full swing Pierce
oscillator/external clock mode allows the input of a square wave. Before asserting the oscillator to the
internal system clocks the quality of the oscillation is checked for each start from either power-on, STOP
or oscillator fail. t_CQOUT specifies the maximum time before switching to the internal self clock mode after
POR or STOP if a proper oscillation is not detected. The quality check also determines the minimum
oscillator start-up time t_UPOSC. The device also features a clock monitor. A Clock Monitor Failure is
asserted if the frequency of the incoming clock signal is below the Assert Frequency f_CMFA.
Table A-19. Oscillator Characteristics
Conditions are shown in Table A-4 unless otherwise noted
Num C
Rating
Symbol
Min
Typ
Max
Unit
1a C Crystal oscillator range (loop controlled Pierce)
1b C Crystal oscillator range (full swing Pierce) ^1,2
f_OSC
4.0
f_OSC
0.5
2 P Startup Current
i_OSC
100
3 C Oscillator start-up time (loop controlled Pierce)
t_UPOSC
—
4 D Clock Quality check time-out
t_CQOUT
0.45
5 P Clock Monitor Failure Assert Frequency
f_CMFA
50
6 P External square wave input frequency
f_EXT
0.5
7 D External square wave pulse width low
t_EXTL
9.5
8 D External square wave pulse width high
t_EXTH
9.5
9 D External square wave rise time
t_EXTR
—
10 D External square wave fall time
t_EXTF
—
11 D Input Capacitance (EXTAL, XTAL pins)
C_IN
—
12 P EXTAL Pin Input High Voltage
V_IH,EXTAL 0.75*V_DDPLL
T EXTAL Pin Input High Voltage
V_IH,EXTAL
—
13 P EXTAL Pin Input Low Voltage
V_IL,EXTAL
—
T EXTAL Pin Input Low Voltage
V_IL,EXTAL V_SSPLL – 0.3
14 C EXTAL Pin Input Hysteresis
V_HYS,EXTAL
—
1 _{Depending on the crystal a damping series resistor might be necessary}
2 _{Only valid if full swing Pierce oscillator/external clock mode is selected}
3 _{fOSC = 4MHz, C = 22pF.}
4 _{Maximum value is for extreme cases using high Q, low frequency crystals}
—
16
—
40
—
—
3³
50⁴
2.5
100
200
—
50
—
—
—
—
—
1
—
1
7
—
—
—
— V_DDPLL + 0.3
— 0.25*V_DDPLL
—
—
250
—
MHz
MHz
µA
ms
s
KHz
MHz
ns
ns
ns
ns
pF
V
V
V
V
mV
MC9S12KG128 Data Sheet, Rev. 1.15
582
Freescale Semiconductor