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MC9S12KG128 Datasheet, PDF (471/600 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 16
Debug Module (DBGV1)
16.1 Introduction
This section describes the functionality of the debug (DBG) sub-block of the HCS12 core platform.
The DBG module is designed to be fully compatible with the existing BKP_HCS12_A module (BKP
mode) and furthermore provides an on-chip trace buffer with ï¬exible triggering capability (DBG mode).
The DBG module provides for non-intrusive debug of application software. The DBG module is optimized
for the HCS12 16-bit architecture.
16.1.1 Features
The DBG module in BKP mode includes these distinctive features:
⢠Full or dual breakpoint mode
â Compare on address and data (full)
â Compare on either of two addresses (dual)
⢠BDM or SWI breakpoint
â Enter BDM on breakpoint (BDM)
â Execute SWI on breakpoint (SWI)
⢠Tagged or forced breakpoint
â Break just before a speciï¬c instruction will begin execution (TAG)
â Break on the ï¬rst instruction boundary after a match occurs (Force)
⢠Single, range, or page address compares
â Compare on address (single)
â Compare on address 256 byte (range)
â Compare on any 16K page (page)
⢠At forced breakpoints compare address on read or write
⢠High and/or low byte data compares
⢠Comparator C can provide an additional tag or force breakpoint (enhancement for BKP mode)
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
471
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