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MC9S12KG128 Datasheet, PDF (285/600 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 9 Freescaleâs Scalable Controller Area Network (MSCANV2)
Table 9-12. CANRIER Register Field Descriptions (continued)
Field
Description
1
OVRIE
Overrun Interrupt Enable
0 No interrupt request is generated from this event.
1 An overrun event causes an error interrupt request.
0
RXFIE
Receiver Full Interrupt Enable
0 No interrupt request is generated from this event.
1 A receive buffer full (successful message reception) event causes a receiver interrupt request.
1 WUPIE and WUPE (see Section 9.3.2.1, âMSCAN Control Register 0 (CANCTL0)â) must both be enabled if the recovery
mechanism from stop or wait is required.
2 Bus-off state is deï¬ned by the CAN standard (see Bosch CAN 2.0A/B protocol speciï¬cation: for only transmitters. Because the
only possible state change for the transmitter from bus-off to TxOK also forces the receiver to skip its current state to RxOK,
the coding of the RXSTAT[1:0] ï¬ags deï¬ne an additional bus-off state for the receiver (see Section 9.3.2.5, âMSCAN Receiver
Flag Register (CANRFLG)â).
9.3.2.7 MSCAN Transmitter Flag Register (CANTFLG)
The transmit buffer empty ï¬ags each have an associated interrupt enable bit in the CANTIER register.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
TXE2
TXE1
TXE0
W
Reset:
0
0
0
0
0
1
1
1
= Unimplemented
Figure 9-8. MSCAN Transmitter Flag Register (CANTFLG)
NOTE
The CANTFLG register is held in the reset state when the initialization
mode is active (INITRQ = 1 and INITAK = 1). This register is writable when
not in initialization mode (INITRQ = 0 and INITAK = 0).
Read: Anytime
Write: Anytime for TXEx ï¬ags when not in initialization mode; write of 1 clears ï¬ag, write of 0 is ignored
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
285
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