MC9S12KG128 Datasheet, PDF (245/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV1)
The analog/digital multiplex operation is performed in the input pads. The input pad is always connected
to the analog inputs of the ATD. The input pad signal is buffered to the digital port registers. This buffer
can be turned on or off with the ATDDIEN0 & ATDDIEN1 register. This is important so that the buffer
does not draw excess current when analog potentials are presented at its input.
7.4.2.3 Low-Power Modes
The ATD can be configured for lower MCU power consumption in three different ways:
• Stop Mode: This halts A/D conversion. Exit from Stop mode will resume A/D conversion, But due
to the recovery time the result of this conversion should be ignored.
• Wait Mode with AWAI = 1: This halts A/D conversion. Exit from Wait mode will resume A/D
conversion, but due to the recovery time the result of this conversion should be ignored.
• Writing ADPU = 0 (Note that all ATD registers remain accessible.): This aborts any A/D
conversion in progress.
NOTE
The reset value for the ADPU bit is zero. Therefore, when this module is
reset, it is reset into the power down state.
7.5 Resets
At reset the ATD is in a power down state. The reset state of each individual bit is listed within the register
description section (see Section 7.3, “Memory Map and Register Definition”) which details the registers
and their bit-field.
7.6 Interrupts
The interrupt requested by the ATD is listed in Table 7-27. Refer to MCU specification for related vector
address and priority.
Table 7-27. ATD Interrupt Vectors
Interrupt Source
Sequence Complete Interrupt
CCR Mask
I bit
Local Enable
ASCIE in ATDCTL2
See Section 7.3, “Memory Map and Register Definition for further details.
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
245