MC9S12KG128 Datasheet, PDF (102/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 2 128 Kbyte ECC Flash Module (FTS128K1ECCV1)
2.4.1.3.1 Erase Verify Command
The erase verify operation is used to confirm that a Flash block is erased. After launching the erase verify
command, the CCIF flag in the FSTAT register will set after the operation has completed unless a second
command has been buffered. The number of bus cycles required to execute the erase verify operation is
equal to the number of addresses in the Flash block plus 12 bus cycles as measured from the time the
CBEIF flag is cleared until the CCIF flag is set. The result of the erase verify operation is reflected in the
state of the BLANK flag in the FSTAT register. If the BLANK flag is set in the FSTAT register, the Flash
memory is erased.
If the ECC logic detects a double bit fault during the erase verify operation, the operation will terminate
immediately and set the DFDIF and ACCERR flags in the FSTAT register. The faulty address will be
stored in the FADDR registers and the ECC parity bits read at the faulty address will be stored in the
FDATALO register. The CCIF flag will set after the DFDIF flag is set and the faulty information is stored
in the FADDR and FDATALO registers.
MC9S12KG128 Data Sheet, Rev. 1.15
102
Freescale Semiconductor