MC9S12KG128 Datasheet, PDF (126/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 3 2 Kbyte EEPROM Module (EETS2KV1)
Table 3-7. ESTAT Field Descriptions (continued)
Field
Description
4
ACCERR
2
BLANK
1
FAIL
0
DONE
EEPROM Access Error — The ACCERR flag indicates an illegal access to the selected EEPROM array
(Section 3.4.1.4, “Illegal EEPROM Operations). This can be either a violation of the command sequence, issuing
an illegal command (illegal combination of the CMDBx bits in the ECMD register) or the execution of a CPU
STOP instruction while a command is executing (CCIF = 0). The ACCERR flag is cleared by writing a 1 to
ACCERR. Writing a 0 to the ACCERR flag has no effect on ACCERR. While ACCERR is set, it is not possible to
launch another command in the EEPROM.
0 No failure
1 Access error has occurred
Array Has Been Verified as Erased — The BLANK flag indicates that an erase verify command has checked
the EEPROM array and found it to be erased. The BLANK flag is cleared by hardware when CBEIF is cleared
as part of a new valid command sequence. Writing to the BLANK flag has no effect on BLANK.
0 If an erase verify command has been requested and the CCIF flag is set, then a 0 in BLANK indicates array
is not erased
1 EEPROM array verifies as erased
Flag Indicating a Failed EEPROM Operation — The FAIL flag will set if the erase verify operation fails
(EEPROM block verified as not erased). The FAIL flag is cleared writing a 1 to FAIL. Writing a 0 to the FAIL flag
has no effect on FAIL.
0 EEPROM operation completed without error
1 EEPROM operation failed
Flag Indicating a Completed EEPROM Operation
0 EEPROM operation is active (program, erase, erase verify)
1 EEPROM operation not active
3.3.2.7 EEPROM Command Register (ECMD)
The ECMD register defines the EEPROM commands.
7
6
5
4
3
2
1
0
R
0
0
CMDB6
CMDB5
W
0
0
CMDB2
CMDB0
Reset
0
0
0
0
0
0
0
0
= Unimplemented or Reserved
Figure 3-11. EEPROM Command Register (ECMD)
CMDB6, CMDB5, CMDB2, and CMDB0 bits are readable and writable during a command sequence
while bits 7, 4, 3, and 1 read 0 and are not writable.
Table 3-8. ECMD Field Descriptions
Field
Description
6, 5, 2, 0
CMDB[6:5]
CMDB2
CMDB0
EEPROM Command — Valid EEPROM commands are shown in Table 3-9. Any other command written than
those mentioned in Table 3-9 sets the ACCERR bit in the ESTAT register.
MC9S12KG128 Data Sheet, Rev. 1.15
126
Freescale Semiconductor