MC9S12KG128 Datasheet, PDF (291/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 9 Freescale’s Scalable Controller Area Network (MSCANV2)
9.3.2.13 MSCAN Reserved Register
reserved for factory testing of the MSCAN module and is not available in normal system operation modes.
7
6
5
4
3
2
1
0
R
0
0
0
0
0
0
0
0
W
Reset:
0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-14. MSCAN Reserved Register
Read: Always read 0x0000 in normal system operation modes
Write: Unimplemented in normal system operation modes
NOTE
Writing to this register when in special modes can alter the MSCAN
functionality.
9.3.2.14 MSCAN Receive Error Counter (CANRXERR)
This register reflects the status of the MSCAN receive error counter.
7
R RXERR7
W
Reset:
0
6
RXERR6
5
RXERR5
0
0
= Unimplemented
4
RXERR4
0
3
RXERR3
0
2
RXERR2
0
1
RXERR1
0
0
RXERR0
0
Figure 9-15. MSCAN Receive Error Counter (CANRXERR)
Read: Only when in sleep mode (SLPRQ = 1 and SLPAK = 1) or initialization mode (INITRQ = 1 and
INITAK = 1)
Write: Unimplemented
NOTE
Reading this register when in any other mode other than sleep or
initialization mode may return an incorrect value. For MCUs with dual
CPUs, this may result in a CPU fault condition.
Writing to this register when in special modes can alter the MSCAN
functionality.
MC9S12KG128 Data Sheet, Rev. 1.15
Freescale Semiconductor
291