MC9S12KG128 Datasheet, PDF (226/600 Pages) Freescale Semiconductor, Inc – Microcontrollers

Chapter 7 Analog-to-Digital Converter (ATD10B16CV1)
7.3.2.2 ATD Control Register 1 (ATDCTL1)
Writes to this register will abort current conversion sequence but will not start a new sequence.
Module Base + 0x0001
7
6
5
4
3
2
R
0
0
0
ETRIGSEL
ETRIGCH3 ETRIGCH2
W
Reset
0
0
0
0
1
1
= Unimplemented or Reserved
Read: Anytime
Figure 7-4. ATD Control Register 1 (ATDCTL1)
1
ETRIGCH1
1
0
ETRIGCH0
1
Write: Anytime
Table 7-3. ATDCTL1 Field Descriptions
Field
Description
7
ETRIGSEL
External Trigger Source Select — This bit selects the external trigger source to be either one of the AD
channels or a specific port pin ETRIG. See device specification for availability and connectivity of ETRIG pin.
If ETRIG pin option is not available, writing a 1 to ETRISEL only sets the bit but has not effect, that means still
one of the AD channels (selected by ETRIGCH3-0) is the source for external trigger.
0 External Trigger source is the AD channel selected by ETRIGCH3-0 (see Table 7-4).
1 External trigger source is ETRIG pin.
3–0
External Trigger Channel Select — If ETRIGSEL = 0 then these bits select one of the AD channels as the
ETRIGCH[3:0] source for external trigger. The coding is summarized Table 7-4.
Table 7-4. External Trigger Channel Select Coding
ETRIGSEL ETRIGCH3 ETRIGCH2 ETRIGCH1 ETRIGCH0
External Trigger Source
0
0
0
0
0
AN0 / PAD0
0
0
0
0
1
AN1 / PAD1
0
0
0
1
0
AN2 / PAD2
0
0
0
1
1
AN3 / PAD3
0
0
1
0
0
AN4 / PAD4
0
0
1
0
1
AN5 / PAD5
0
0
1
1
0
AN6 / PAD6
0
0
1
1
1
AN7 / PAD7
0
1
0
0
0
AN8 / PAD8
0
1
0
0
1
AN9 / PAD9
0
1
0
1
0
AN10 / PAD10
0
1
0
1
1
AN11 / PAD11
0
1
1
0
0
AN12 / PAD12
0
1
1
0
1
AN13 / PAD13
0
1
1
1
0
AN14 / PAD14
0
1
1
1
1
1
X
X
X
X
AN15 / PAD15
ETRIG¹
1 _{Only if ETRIG pin option available (see device specification), else external trigger source is still on one of}
the AD channels selected by ETRIGCH3–0
MC9S12KG128 Data Sheet, Rev. 1.15
226
Freescale Semiconductor