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MC9S12KG128 Datasheet, PDF (290/600 Pages) Freescale Semiconductor, Inc – Microcontrollers | |||
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Chapter 9 Freescaleâs Scalable Controller Area Network (MSCANV2)
9.3.2.12 MSCAN Identiï¬er Acceptance Control Register (CANIDAC)
The CANIDAC register is used for identiï¬er acceptance control as described below.
R
W
Reset:
7
6
5
4
3
2
1
0
0
0
IDHIT2
IDHIT1
IDAM1
IDAM0
0
0
0
0
0
0
0
= Unimplemented
Figure 9-13. MSCAN Identiï¬er Acceptance Control Register (CANIDAC)
0
IDHIT0
0
Read: Anytime
Write: Anytime in initialization mode (INITRQ = 1 and INITAK = 1), except bits IDHITx, which are
read-only
Table 9-18. CANIDAC Register Field Descriptions
Field
Description
5:4
IDAM[1:0]
2:0
IDHIT[2:0]
Identiï¬er Acceptance Mode â The CPU sets these ï¬ags to deï¬ne the identiï¬er acceptance ï¬lter organization
(see Section 9.4.3, âIdentiï¬er Acceptance Filterâ). Table 9-19 summarizes the different settings. In ï¬lter closed
mode, no message is accepted such that the foreground buffer is never reloaded.
Identiï¬er Acceptance Hit Indicator â The MSCAN sets these ï¬ags to indicate an identiï¬er acceptance hit (see
Section 9.4.3, âIdentiï¬er Acceptance Filterâ). Table 9-20 summarizes the different settings.
IDAM1
0
0
1
1
Table 9-19. Identiï¬er Acceptance Mode Settings
IDAM0
0
1
0
1
Identiï¬er Acceptance Mode
Two 32-bit acceptance ï¬lters
Four 16-bit acceptance ï¬lters
Eight 8-bit acceptance ï¬lters
Filter closed
Table 9-20. Identiï¬er Acceptance Hit Indication
IDHIT2
IDHIT1
IDHIT0
Identiï¬er Acceptance Hit
0
0
0
0
0
1
0
1
0
Filter 0 hit
Filter 1 hit
Filter 2 hit
0
1
1
1
0
0
1
0
1
Filter 3 hit
Filter 4 hit
Filter 5 hit
1
1
0
1
1
1
Filter 6 hit
Filter 7 hit
The IDHITx indicators are always related to the message in the foreground buffer (RxFG). When a
message gets shifted into the foreground buffer of the receiver FIFO the indicators are updated as well.
MC9S12KG128 Data Sheet, Rev. 1.15
290
Freescale Semiconductor
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