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SAM7S256_14 Datasheet, PDF (94/775 Pages) ATMEL Corporation – ARM-based Flash MCU | |||
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16.4.3 Watchdog Timer Status Register
Register Name:
WDT_SR
Access Type:
Read-only
31
30
29
28
27
26
25
24
â
â
â
â
â
â
â
â
23
22
21
20
19
18
17
16
â
â
â
â
â
â
â
â
15
14
13
12
11
10
9
8
â
â
â
â
â
â
â
â
7
6
5
4
3
2
1
0
â
â
â
â
â
â
WDERR
WDUNF
⢠WDUNF: Watchdog Underflow
0: No Watchdog underflow occurred since the last read of WDT_SR.
1: At least one Watchdog underflow occurred since the last read of WDT_SR.
⢠WDERR: Watchdog Error
0: No Watchdog error occurred since the last read of WDT_SR.
1: At least one Watchdog error occurred since the last read of WDT_SR.
Note:The WDD and WDV values must not be modified within a period of time of 3 slow clock periods following a restart of
the watchdog performed by means of a write access in the WDT_CR register, else the watchdog may trigger an end of
period earlier than expected.
SAM7S Series [DATASHEET] 94
6175MâATARMâ26-Oct-12
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