SAM7S256_14 Datasheet, PDF (14/775 Pages) ATMEL Corporation – ARM-based Flash MCU

6. I/O Lines Considerations
6.1 JTAG Port Pins
TMS, TDI and TCK are schmitt trigger inputs. TMS and TCK are 5-V tolerant, TDI is not. TMS, TDI and TCK do not
integrate a pull-up resistor.
TDO is an output, driven at up to VDDIO, and has no pull-up resistor.
The JTAGSEL pin is used to select the JTAG boundary scan when asserted at a high level. The JTAGSEL pin integrates
a permanent pull-down resistor of about 15 kΩ to GND, so that it can be left unconnected for normal operations.
6.2 Test Pin
The TST pin is used for manufacturing test, fast programming mode or SAM-BA Boot Recovery of the SAM7S Series
when asserted high. The TST pin integrates a permanent pull-down resistor of about 15 kΩ to GND, so that it can be left
unconnected for normal operations.
To enter fast programming mode, the TST pin and the PA0 and PA1 pins should be tied high and PA2 tied to low.
To enter SAM-BA Boot Recovery, the TST pin and the PA0, PA1 and PA2 pins should be tied high for at least 10
seconds. Then a power cycle of the board is mandatory.
Driving the TST pin at a high level while PA0 or PA1 is driven at 0 leads to unpredictable results.
6.3 Reset Pin
The NRST pin is bidirectional with an open drain output buffer. It is handled by the on-chip reset controller and can be
driven low to provide a reset signal to the external components or asserted low externally to reset the microcontroller.
There is no constraint on the length of the reset pulse, and the reset controller can guarantee a minimum pulse length.
This allows connection of a simple push-button on the pin NRST as system user reset, and the use of the signal NRST to
reset all the components of the system.
The NRST pin integrates a permanent pull-up resistor to VDDIO.
6.4 ERASE Pin
The ERASE pin is used to re-initialize the Flash content and some of its NVM bits. It integrates a permanent pull-down
resistor of about 15 kΩ to GND, so that it can be left unconnected for normal operations.
6.5 PIO Controller A Lines
z All the I/O lines PA0 to PA31on SAM7S512/256/128/64/321 (PA0 to PA20 on SAM7S32) are 5V-tolerant and all
integrate a programmable pull-up resistor.
z All the I/O lines PA0 to PA31 on SAM7S161 (PA0 to PA20 on SAM7S16) are not 5V-tolerant and all integrate a
programmable pull-up resistor.
Programming of this pull-up resistor is performed independently for each I/O line through the PIO controllers.
5V-tolerant means that the I/O lines can drive voltage level according to VDDIO, but can be driven with a voltage of up to
5.5V. However, driving an I/O line with a voltage over VDDIO while the programmable pull-up resistor is enabled will
create a current path through the pull-up resistor from the I/O line to VDDIO. Care should be taken, in particular at reset,
as all the I/O lines default to input with the pull-up resistor enabled at reset.
6.6 I/O Line Drive Levels
The PIO lines PA0 to PA3 are high-drive current capable. Each of these I/O lines can drive up to 16 mA permanently.
The remaining I/O lines can draw only 8 mA.
However, the total current drawn by all the I/O lines cannot exceed 150 mA (100 mA for SAM7S32/16).
SAM7S Series [DATASHEET] 14
6175M–ATARM–26-Oct-12