SAM7S256_14 Datasheet, PDF (295/775 Pages) ATMEL Corporation – ARM-based Flash MCU

29. Two-wire Interface (TWI) SAM7S512/256/128/64/321/32
NOTE: This definition of the TWI does not pertain to SAM7S16/161. For SAM7S16/161, see
Section 30.
29.1 Overview
The Two-wire Interface (TWI) interconnects components on a unique two-wire bus, made up of
one clock line and one data line with speeds of up to 400 Kbits per second, based on a byte-ori-
ented transfer format. It can be used with any Atmel Two-wire Interface bus Serial EEPROM and
I²C compatible device such as Real Time Clock (RTC), Dot Matrix/Graphic LCD Controllers and
Temperature Sensor, to name but a few. The TWI is programmable as master transmitter or
master receiver with sequential or single-byte access. A configurable baud rate generator per-
mits the output data rate to be adapted to a wide range of core clock frequencies. Below, Table
29-1 lists the compatibility level of the Atmel Two-wire Interface and a full I2C compatible device.
Table 29-1. Atmel TWI compatibility with i2C Standard
I2C Standard
Atmel TWI
Standard Mode Speed (100 KHz)
Supported
Fast Mode Speed (400 KHz)
Supported
7 or 10 bits Slave Addressing
START BYTE⁽¹⁾
Repeated Start (Sr) Condition
Supported
Not Supported
Not Fully Supported⁽²⁾
ACK and NACK Management
Supported
Slope control and input filtering (Fast mode)
Not Supported
Clock stretching
Supported
Notes: 1. START + b000000001 + Ack + Sr
2. A repeated start condition is only supported in Master Receiver mode. See Section 29.6.5
“Internal Address” on page 301
29.2 List of Abbreviations
Table 29-2. Abbreviations
Abbreviation
TWI
A
N
P
S
Sr
DADR
IADR
R
W
Description
Two-wire Interface
Acknowledge
Not Acknowledge
Stop
Start
Repeated Start
Device Address
Internal Address
Read
Write
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
295