SAM7S256_14 Datasheet, PDF (376/775 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 31-16. Receiver Time-out Block Diagram
Baud Rate
Clock
1
STTTO
Character
Received
RETTO
DQ
Clear
Clock
TO
16-bit Time-out
Counter
Load
16-bit
Value
=
0
TIMEOUT
Table 31-8 gives the maximum time-out period for some standard baud rates.
Table 31-8. Maximum Time-out Period
Baud Rate
bit/sec
600
1 200
2 400
4 800
9 600
14400
19200
28800
33400
56000
57600
200000
Bit Time
µs
1 667
833
417
208
104
69
52
35
30
18
17
5
Time-out
ms
109 225
54 613
27 306
13 653
6 827
4 551
3 413
2 276
1 962
1 170
1 138
328
31.6.3.9 Framing Error
The receiver is capable of detecting framing errors. A framing error happens when the stop bit of a received char-
acter is detected at level 0. This can occur if the receiver and the transmitter are fully desynchronized.
A framing error is reported on the FRAME bit of the Channel Status Register (US_CSR). The FRAME bit is
asserted in the middle of the stop bit as soon as the framing error is detected. It is cleared by writing the Control
Register (US_CR) with the RSTSTA bit at 1.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
376