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SAM7S256_14 Datasheet, PDF (313/775 Pages) ATMEL Corporation – ARM-based Flash MCU | |||
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29.7.4 TWI Clock Waveform Generator Register
Register Name:
TWI_CWGR
Access Type:
Read-write
31
30
29
28
27
â
â
â
â
â
23
22
21
20
19
â
â
â
â
â
15
14
13
12
11
CHDIV
7
6
5
4
3
CLDIV
⢠CLDIV: Clock Low Divider
The SCL low period is defined as follows:
Tlow = ((CLDIV Ã 2CKDIV) + 3 ) Ã TMCK
⢠CHDIV: Clock High Divider
The SCL high period is defined as follows:
Thigh = ((CHDIV Ã 2CKDIV) + 3 ) Ã TMCK
⢠CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
26
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24
â
â
â
18
17
16
CKDIV
10
9
8
2
1
0
SAM7S Series [DATASHEET]
6175MâATARMâ26-Oct-12
313
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