SAM7S256_14 Datasheet, PDF (372/775 Pages) ATMEL Corporation – ARM-based Flash MCU

31.6.3.4 Receiver Operations
When a character reception is completed, it is transferred to the Receive Holding Register (US_RHR) and the
RXRDY bit in the Status Register (US_CSR) rises. If a character is completed while the RXRDY is set, the OVRE
(Overrun Error) bit is set. The last character is transferred into US_RHR and overwrites the previous one. The
OVRE bit is cleared by writing the Control Register (US_CR) with the RSTSTA (Reset Status) bit at 1.
Figure 31-13. Receiver Status
Baud Rate
Clock
RXD
Write
US_CR
Read
US_RHR
Start
Bit
D0
D1
D2
D3
D4
D5
D6
D7
ParityStop Start
Bit Bit Bit
D0
D1
D2
D3
D4
D5
D6
D7
Parity Stop
Bit Bit
RSTSTA = 1
RXRDY
OVRE
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
372