SAM7S256_14 Datasheet, PDF (433/775 Pages) ATMEL Corporation – ARM-based Flash MCU

• FSOS: Transmit Frame Sync Output Selection
FSOS
Selected Transmit Frame Sync Signal
0x0
None
0x1
Negative Pulse
0x2
Positive Pulse
0x3
Driven Low during data transfer
0x4
Driven High during data transfer
0x5
Toggling at each start of data transfer
0x6-0x7
Reserved
• FSDEN: Frame Sync Data Enable
0 = The TD line is driven with the default value during the Transmit Frame Sync signal.
1 = SSC_TSHR value is shifted out during the transmission of the Transmit Frame Sync signal.
• FSEDGE: Frame Sync Edge Detection
Determines which edge on frame sync will generate the interrupt TXSYN (Status Register).
FSEDGE
0x0
0x1
Frame Sync Edge Detection
Positive Edge Detection
Negative Edge Detection
TF Pin
Input-only
Output
Output
Output
Output
Output
Undefined
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
433