SAM7S256_14 Datasheet, PDF (22/775 Pages) ATMEL Corporation – ARM-based Flash MCU

8.8 Embedded Flash
8.8.1
Flash Overview
z The Flash of the SAM7S512 is organized in two banks (dual plane) of 1024 pages of 256 bytes. The 524,288 bytes
are organized in 32-bit words.
z The Flash of the SAM7S256 is organized in 1024 pages (single plane) of 256 bytes. The 262,144 bytes are
organized in 32-bit words.
z The Flash of the SAM7S128 is organized in 512 pages (single plane) of 256 bytes. The 131,072 bytes are
organized in 32-bit words.
z The Flash of the SAM7S64 is organized in 512 pages (single plane) of 128 bytes. The 65,536 bytes are organized
in 32-bit words.
z The Flash of the SAM7S321/32 is organized in 256 pages (single plane) of 128 bytes. The 32,768 bytes are
organized in 32-bit words.
z The Flash of the SAM7S161/16 is organized in 256 pages (single plane) of 64 bytes. The 16,384 bytes are
organized in 32-bit words.
z The Flash of the SAM7S512/256/128 contains a 256-byte write buffer, accessible through a 32-bit interface.
z The Flash of the SAM7S64/321/32/161/16 contains a 128-byte write buffer, accessible through a 32-bit interface.
The Flash benefits from the integration of a power reset cell and from the brownout detector. This prevents code
corruption during power supply changes, even in the worst conditions.
When Flash is not used (read or write access), it is automatically placed into standby mode.
8.8.2
Embedded Flash Controller
The Embedded Flash Controller (EFC) manages accesses performed by the masters of the system. It enables reading
the Flash and writing the write buffer. It also contains a User Interface, mapped within the Memory Controller on the APB.
The User Interface allows:
z programming of the access parameters of the Flash (number of wait states, timings, etc.)
z starting commands such as full erase, page erase, page program, NVM bit set, NVM bit clear, etc.
z getting the end status of the last command
z getting error status
z programming interrupts on the end of the last commands or on errors
The Embedded Flash Controller also provides a dual 32-bit prefetch buffer that optimizes 16-bit access to the Flash. This
is particularly efficient when the processor is running in Thumb mode.
Two EFCs are embedded in the SAM7S512 to control each bank of 256 Kbytes. Dual plane organization allows
concurrent Read and Program. Read from one memory plane may be performed even while program or erase functions
are being executed in the other memory plane.
One EFC is embedded in the SAM7S256/128/64/32/321/161/16 to control the single plane 256/128/64/32/16 Kbytes.
SAM7S Series [DATASHEET] 22
6175M–ATARM–26-Oct-12