SAM7S256_14 Datasheet, PDF (303/775 Pages) ATMEL Corporation – ARM-based Flash MCU

29.6.6
Read/Write Flowcharts
The following flowcharts shown in Figure 29-13, Figure 29-14 on page 304, Figure 29-15 on
page 305, Figure 29-16 on page 306, Figure 29-17 on page 307 and Figure 29-18 on page 308
give examples for read and write operations. A polling or interrupt method can be used to check
the status bits. The interrupt method requires that the interrupt enable register (TWI_IER) be
configured first.
Figure 29-13. TWI Write Operation with Single Data Byte without Internal Address
BEGIN
Set TWI clock
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
(Needed only once)
Set the Control register:
- Master enable
TWI_CR = MSEN
Set the Master Mode register:
- Device slave address (DADR)
- Transfer direction bit
Write ==> bit MREAD = 0
Load Transmit register
TWI_THR = Data to send
Read Status register
No
TXRDY = 1?
Yes
Read Status register
No
TXCOMP = 1?
Yes
Transfer finished
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
303