SAM7S256_14 Datasheet, PDF (126/775 Pages) ATMEL Corporation – ARM-based Flash MCU

20.2.2 Signal Names
Depending on the MODE settings, DATA is latched in different internal registers.
Table 20-2.
MODE[3:0]
0000
0001
0010
0011
0100
0101
Default
Mode Coding
Symbol
CMDE
ADDR0
ADDR1
ADDR2
ADDR3
DATA
IDLE
Data
Command Register
Address Register LSBs
Address Register MSBs
Data Register
No register
When MODE is equal to CMDE, then a new command (strobed on DATA[15:0] or DATA[7:0] signals) is stored in
the command register.
Note: DATA[7:0] pertains to the SAM7S32/16.
Table 20-3. Command Bit Coding
DATA[15:0]
DATA[7:0]⁽¹⁾
Symbol
0x0011
READ
0x0012
WP
0x0022
WPL
0x0032
EWP
0x0042
EWPL
0x0013
EA
0x0014
SLB
0x0024
CLB
0x0015
GLB
0x0034
SGPB
0x0044
CGPB
0x0025
GGPB
0x0054
SSE
0x0035
GSE
0x001F
WRAM
0x0016
SEFC
0x001E
GVE
Command Executed
Read Flash
Write Page Flash
Write Page and Lock Flash
Erase Page and Write Page
Erase Page and Write Page then Lock
Erase All
Set Lock Bit
Clear Lock Bit
Get Lock Bit
Set General Purpose NVM bit
Clear General Purpose NVM bit
Get General Purpose NVM bit
Set Security Bit
Get Security Bit
Write Memory
Select EFC Controller⁽²⁾
Get Version
Notes: 1. DATA[7:0] pertains to the SAM7S32/16.
2. Applies to SAM7S512.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
126