SAM7S256_14 Datasheet, PDF (654/775 Pages) ATMEL Corporation – ARM-based Flash MCU

40.11.11.5 TWI: Possible Receive Holding Register Corruption
When loading the TWI_RHR, the transfer direction is ignored. The last data byte received in the TWI_RHR is cor-
rupted at the end of the first subsequent transmit data byte. Neither RXRDY nor OVERRUN status bits are set if
this occurs.
Problem Fix/Workaround
The user must be sure that received data is read before transmitting any new data.
40.11.12 USART: Universal Synchronous Asynchronous Receiver Transmitter
40.11.12.1 USART: CTS in Hardware Handshaking
When Hardware Handshaking is used and if CTS goes low near the end of the starting bit, a character can be lost.
Problem Fix/Workaround
CTS must not go low during a time slot occurring between 2 Master Clock periods before the starting bit and 16
Master Clock periods after the rising edge of the starting bit.
40.11.12.2 USART: Hardware Handshaking – Two Characters Sent
If CTS switches from 0 to 1 during the TX of a character and if the holding register (US_THR) is not empty, the con-
tent of US_THR will also be transmitted.
Problem Fix/Workaround
Don't use the PDC in transmit mode and do not fill US_THR before TXEMPTY is set at 1.
40.11.12.3 USART: XOFF Character Bad Behavior
The XOFF character is sent only when the receive buffer is detected full. While the XOFF is being sent, the remote
transmitter is still transmitting. As only one Holding register is available in the receiver, characters will be lost in
reception. This makes the software handshaking functionality ineffective.
Problem Fix/Workaround
None.
40.11.12.4 USART: RXBRK Flag Error in Asynchronous Mode
In receiver mode, when there are two consecutive characters (without timeguard in between), RXBRK is not taken
into account. As a result, the RXBRK flag is not enabled correctly and the frame error flag is set.
Problem Fix/Workaround
Constraints on the transmitter device connected to the SAM7S USART receiver side:
The transmitter may use the timeguard feature or send two STOP conditions. Only one STOP condition is taken
into account by the receiver state machine. After this STOP condition, as there is no valid data, the receiver state
machine will go in idle mode and enable the RXBRK flag.
40.11.12.5 USART: DCD is active High instead of Low
The DCD signal is active at High level in the USART Modem Mode.
DCD should be active at Low level.
Problem Fix/Workaround
Add an inverter.
40.11.13 Voltage Regulator
40.11.13.1 Voltage Regulator: Current Consumption in Deep Mode
Current consumption in Deep Mode is maximum 60 µA instead of 25 µA.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
654