SAM7S256_14 Datasheet, PDF (420/775 Pages) ATMEL Corporation – ARM-based Flash MCU

Figure 32-15. Receive Frame Format in Continuous Mode
Start = Enable Receiver
RD
Data
Data
To SSC_RHR
To SSC_RHR
DATLEN
DATLEN
Note: 1. STTDLY is set to 0.
32.6.8 Loop Mode
The receiver can be programmed to receive transmissions from the transmitter. This is done by setting the Loop
Mode (LOOP) bit in SSC_RFMR. In this case, RD is connected to TD, RF is connected to TF and RK is connected
to TK.
32.6.9 Interrupt
Most bits in SSC_SR have a corresponding bit in interrupt management registers.
The SSC can be programmed to generate an interrupt when it detects an event. The interrupt is controlled by writ-
ing SSC_IER (Interrupt Enable Register) and SSC_IDR (Interrupt Disable Register) These registers enable and
disable, respectively, the corresponding interrupt by setting and clearing the corresponding bit in SSC_IMR (Inter-
rupt Mask Register), which controls the generation of interrupts by asserting the SSC interrupt line connected to
the AIC.
Figure 32-16. Interrupt Block Diagram
PDC
TXBUFE
ENDTX
RXBUFF
ENDRX
SSC_IMR
SSC_IER
Set
SSC_IDR
Clear
Transmitter
TXRDY
TXEMPTY
TXSYNC
Receiver
RXRDY
OVRUN
RXSYNC
Interrupt
Control
SSC Interrupt
32.7
SSC Application Examples
The SSC can support several serial communication modes used in audio or high speed serial links. Some standard
applications are shown in the following figures. All serial link applications supported by the SSC are not listed here.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
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