SAM7S256_14 Datasheet, PDF (132/775 Pages) ATMEL Corporation – ARM-based Flash MCU

Table 20-9. Write Command (Continued)
Step Handshake Sequence MODE[3:0]
...
...
...
n
Write handshaking
ADDR0
n+1
Write handshaking
ADDR1
n+2
Write handshaking
ADDR2
n+3
Write handshaking
ADDR3
n+4
Write handshaking
DATA
n+5
Write handshaking
DATA
...
...
...
DATA[7:0]
...
Memory Address LSB
Memory Address
Memory Address
Memory Address
*Memory Address++
*Memory Address++
...
The Flash command Write Page and Lock (WPL) is equivalent to the Flash Write Command. However, the lock
bit is automatically set at the end of the Flash write operation. As a lock region is composed of several pages, the
programmer writes to the first pages of the lock region using Flash write commands and writes to the last page of
the lock region using a Flash write and lock command.
The Flash command Erase Page and Write (EWP) is equivalent to the Flash Write Command. However, before
programming the load buffer, the page is erased.
The Flash command Erase Page and Write the Lock (EWPL) combines EWP and WPL commands.
20.2.5.3 Flash Full Erase Command
This command is used to erase the Flash memory planes.
All lock regions must be unlocked before the Full Erase command by using the CLB command. Otherwise, the
erase command is aborted and no page is erased.
Table 20-10. Full Erase Command
Step Handshake Sequence
1
Write handshaking
2
Write handshaking
MODE[3:0]
CMDE
DATA
DATA[15:0] or DATA[7:0]
EA
0
20.2.5.4 Flash Lock Commands
Lock bits can be set using WPL or EWPL commands. They can also be set by using the Set Lock command
(SLB). With this command, several lock bits can be activated. A Bit Mask is provided as argument to the com-
mand. When bit 0 of the bit mask is set, then the first lock bit is activated.
In the same way, the Clear Lock command (CLB) is used to clear lock bits. All the lock bits are also cleared by the
EA command.
Table 20-11. Set and Clear Lock Bit Command
Step Handshake Sequence
MODE[3:0]
1
Write handshaking
CMDE
2
Write handshaking
DATA
DATA[15:0] or DATA[7:0]
SLB or CLB
Bit Mask
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
132