SAM7S256_14 Datasheet, PDF (410/775 Pages) ATMEL Corporation – ARM-based Flash MCU

32.3 Application Block Diagram
Figure 32-2. Application Block Diagram
OS or RTOS Driver
Power
Management
Interrupt
Management
Test
Management
Serial AUDIO
Codec
SSC
Time Slot
Frame
Management Management
Line Interface
32.4 Pin Name List
Table 32-1.
Pin Name
RF
RK
RD
TF
TK
TD
I/O Lines Description
Pin Description
Receiver Frame Synchro
Receiver Clock
Receiver Data
Transmitter Frame Synchro
Transmitter Clock
Transmitter Data
Type
Input/Output
Input/Output
Input
Input/Output
Input/Output
Output
32.5 Product Dependencies
32.5.1 I/O Lines
The pins used for interfacing the compliant external devices may be multiplexed with PIO lines.
Before using the SSC receiver, the PIO controller must be configured to dedicate the SSC receiver I/O lines to the
SSC peripheral mode.
Before using the SSC transmitter, the PIO controller must be configured to dedicate the SSC transmitter I/O lines
to the SSC peripheral mode.
32.5.2 Power Management
The SSC is not continuously clocked. The SSC interface may be clocked through the Power Management Control-
ler (PMC), therefore the programmer must first configure the PMC to enable the SSC clock.
32.5.3 Interrupt
The SSC interface has an interrupt line connected to the Advanced Interrupt Controller (AIC). Handling interrupts
requires programming the AIC before configuring the SSC.
All SSC interrupts can be enabled/disabled configuring the SSC Interrupt mask register. Each pending and
unmasked SSC interrupt will assert the SSC interrupt line. The SSC interrupt service routine can get the interrupt
origin by reading the SSC interrupt status register.
32.6
Functional Description
This chapter contains the functional description of the following: SSC Functional Block, Clock Management, Data
format, Start, Transmitter, Receiver and Frame Sync.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
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