English
Language : 

SAM7S256_14 Datasheet, PDF (343/775 Pages) ATMEL Corporation – ARM-based Flash MCU
30.9.5.5 Reversal after a Repeated Start
Reversal of Read to Write
The master initiates the communication by a read command and finishes it by a write command.
Figure 30-29 on page 343 describes the repeated start + reversal from Read to Write mode.
Figure 30-29. Repeated Start + Reversal from Read to Write Mode
TWI_THR
DATA0
DATA1
TWD
S SADR R A DATA0 A DATA1 NA Sr SADR W A DATA2 A DATA3 A P
TWI_RHR
SVACC
SVREAD
TXRDY
RXRDY
EOSACC
TXCOMP
As soon as a START is detected
DATA2
DATA3
Cleared after read
1. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
Reversal of Write to Read
The master initiates the communication by a write command and finishes it by a read command.Figure 30-30 on
page 343 describes the repeated start + reversal from Write to Read mode.
Figure 30-30. Repeated Start + Reversal from Write to Read Mode
TWI_THR
DATA2
DATA3
TWD
S SADR W A DATA0 A DATA1 A Sr SADR R A DATA2 A DATA3 NA P
TWI_RHR
SVACC
SVREAD
TXRDY
RXRDY
EOSACC
TXCOMP
DATA0
Read TWI_RHR
As soon as a START is detected
DATA1
Cleared after read
Notes: 1. In this case, if TWI_THR has not been written at the end of the read command, the clock is automatically stretched before
the ACK.
2. TXCOMP is only set at the end of the transmission because after the repeated start, SADR is detected again.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
343