SAM7S256_14 Datasheet, PDF(617/775 Page) ATMEL Corporation – ARM-based Flash MCU

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SAM7S256_14 Datasheet, PDF (617/775 Pages) ATMEL Corporation – ARM-based Flash MCU

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40.6.5 Parallel Input/Output Controller (PIO)

40.6.5.1 PIO: Leakage on PA17 - PA20

When PA17, PA18, PA19 or PA20 (the I/O lines multiplexed with the analog inputs) are set as digital inputs with

pull-up disabled, the leakage can be 9 ÂµA in worst case and 90 nA in typical case per I/O when the I/O is set exter-

nally at low level.

Problem Fix/Workaround

Set the I/O to VDDIO by internal or external pull-up.

40.6.5.2 PIO: Electrical Characteristics on NRST and PA0-PA16 and PA21-31

When NRST or PA0-PA16 or PA21-PA31 are set as digital inputs with pull-up enabled, the voltage of the I/O stabi-

lizes at VPull-up.

Vpull-up

VPull-up Min

VDDIO - 0.65 V

VPull-up Max

VDDIO - 0.45 V

This condition causes a leakage through VDDIO. This leakage is 45 ÂµA per pad in worst case at 3.3 V and 25 ÂµA at

1.8V.

I Leakage

Parameter

I Leakage at 3,3V

I Leakage at 1.8V

Typ

2.5 ÂµA

1 ÂµA

Max

45 ÂµA

25 ÂµA

Problem Fix/Workaround

It is recommended to use an external pull-up if needed.

40.6.5.3 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31

When NRST or PA0-PA16 and or PA21-PA31 are set as digital inputs with pull-up enabled, driving the I/O with an

output impedance higher than 500 ohms may not drive the I/O to a logical zero.

Problem Fix/Workaround

Output impedance must be lower than 500 ohms.

40.6.6 Power Management Controller (PMC)

40.6.6.1 PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1

Under certain rare circumstances, when CSS = 00 in PMC_MCKR, and PA1 is set as an input and a transition

occurs on PA1, device malfunction might occur.

Problem Fix/Workaround

Do not transition PA1 as an input when CSS = 00 in PMC_MCKR.

40.6.6.2 PMC: Programming CSS in PMC_MCKR Register

Under certain rare circumstances, reprogramming the CSS value in the PMC_MCKR register (i.e switching the

main clock source) might generate malfunction of the device if the following two actions occur simultaneously.

1. Switching from:

â PLL Clock to Slow Clock or

SAM7S Series [DATASHEET]

6175MâATARMâ26-Oct-12

617

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