SAM7S256_14 Datasheet, PDF (675/775 Pages) ATMEL Corporation – ARM-based Flash MCU

40.14.3.2 PWM: Update when PWM_CPRDx = 0
When Channel Period Register equals 0, the period update is not operational.
Problem Fix/Workaround
Do not write 0 in the period register.
40.14.3.3 PWM: Counter Start Value
In left aligned mode, the first start value of the counter is 0. For the other periods, the counter starts at 1.
Problem Fix/Workaround
None.
40.14.4 Real Time Timer (RTT)
40.14.4.1 RTT: Possible Event Loss when Reading RTT_SR
If an event (RTTINC or ALMS) occurs within the same slow clock cycle during which the RTT_SR is read, the cor-
responding bit might be cleared. This can lead to the loss of this event.
Problem Fix/Workaround:
The software must handle the RTT event as an interrupt and should not poll RTT_SR.
40.14.5 USART: Universal Synchronous Asynchronous Receiver Transmitter
40.14.5.1 USART: DCD is active High instead of Low
The DCD signal is active at High level in the USART Modem Mode.
DCD should be active at Low level.
Problem Fix/Workaround
Add an inverter.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
675