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SAM7S256_14 Datasheet, PDF (649/775 Pages) ATMEL Corporation – ARM-based Flash MCU
This condition causes a leakage through VDDIO. This leakage is 45 µA per pad in worst case at 3.3 V and 25 µA at
1.8V.
I Leakage
Parameter
I Leakage at 3,3V
I Leakage at 1.8V
Typ
2.5 µA
1 µA
Max
45 µA
25 µA
Problem Fix/Workaround
It is recommended to use an external pull-up if needed.
40.11.5.3 PIO: Drive Low NRST, PA0-PA16 and PA21-PA31
When NRST or PA0-PA16 and or PA21-PA31 are set as digital inputs with pull-up enabled, driving the I/O with an
output impedance higher than 500 ohms may not drive the I/O to a logical zero.
Problem Fix/Workaround
Output impedance must be lower than 500 ohms.
40.11.6 Power Management Controller (PMC)
40.11.6.1 PMC: Slow Clock Selected in PMC and a Transition Occurs on PA1
Under certain rare circumstances, when CSS = 00 in PMC_MCKR, and PA1 is set as an input and a transition
occurs on PA1, device malfunction might occur.
Problem Fix/Workaround
Do not transition PA1 as an input when CSS = 00 in PMC_MCKR.
40.11.6.2 PMC: Programming CSS in PMC_MCKR Register
Under certain rare circumstances, reprogramming the CSS value in the PMC_MCKR register (i.e switching the
main clock source) might generate malfunction of the device if the following two actions occur simultaneously.
1. Switching from:
– PLL Clock to Slow Clock or
– PLL Clock to Main Clock or
– Main Clock to PLL Clock or
– Main Clock to Slow Clock
And
2. Program code is being executed out of flash, or a transition is occurring on PA1, either as an input or
output.
Note: This issue does not occur when transitioning from slow clock to main clock or from slow clock to PLL clock.
Problem Fix/Workaround
When changing CSS in the PMC_MCKR to switch from
– PLL Clock to Slow Clock or
– PLL Clock to Main Clock or
– Main Clock to PLL Clock or
– Main Clock to Slow Clock
Ensure that the processor is executing out of SRAM and ensure no transition occurs on PA1, either as an input or
output, starting from writing to the PMC_MCKR register until MCKRDY = 1.
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
649