SAM7S256_14 Datasheet, PDF (351/775 Pages) ATMEL Corporation – ARM-based Flash MCU

30.10.5 TWI Clock Waveform Generator Register
Name:
TWI_CWGR
Access:
Read-write
Reset Value: 0x00000000
31
30
29
28
27
–
–
–
–
–
23
22
21
20
19
15
14
13
7
6
5
TWI_CWGR is only used in Master mode.
• CLDIV: Clock Low Divider
The SCL low period is defined as follows:
T_low = ((CLDIV × 2^CKDIV) + 4 ) × T_MCK
12
11
CHDIV
4
3
CLDIV
• CHDIV: Clock High Divider
The SCL high period is defined as follows:
T_high = ((CHDIV × 2^CKDIV) + 4 ) × T_MCK
• CKDIV: Clock Divider
The CKDIV is used to increase both SCL high and low periods.
26
25
24
–
–
–
18
17
16
CKDIV
10
9
8
2
1
0
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
351