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SAM7S256_14 Datasheet, PDF (759/775 Pages) ATMEL Corporation – ARM-based Flash MCU
Version
6175H
Comments (Continued)
All AT91SAM7S:
“Analog-to-Digital Converter (ADC)” , errata applies to all AT91SAM7S products.
“USART: DCD is active High instead of Low” , errata applies to all AT91SAM7S products.
“SPI: Bad Serial Clock Generation on 2nd Chip Select” , errata applies to all AT91SAM7S products.
“SPI: Bad Behavior when CSAAT = 1 and SCBR = 1”, errata applies to all AT91SAM7S products.
AT91SAM7S256 Mfg # 58818C, AT91SAM7S256 Parts.A, AT91SAM7S128 Mfg # 58818C,
AT91SAM7S128 Parts A,
added the following:
Section 40.6.14.2 ”WDT: The Watchdog Timer Status Register and Interrupt”
Section 40.7.13.2 ”WDT: The Watchdog Timer Status Register and Interrupt”
Section 40.11.14.2 ”WDT: The Watchdog Timer Status Register and Interrupt”
Section 40.12.13.2 ”WDT: The Watchdog Timer Status Register and Interrupt”
AT91SAM7S512 Section 40.4.9.1 ”USART: CTS in Hardware Handshaking” updated
AT91SAM7S512/256/128, added the following: (and in newly added “B Parts”)
Section 40.4.9.4 ”USART: RXBRK Flag Error in Asynchronous Mode”
Section 40.6.12.4 ”USART: RXBRK Flag Error in Asynchronous Mode”
Section 40.11.12.4 ”USART: RXBRK Flag Error in Asynchronous Mode”
Section 40.12.11.4 ”USART: RXBRK Flag Error in Asynchronous Mode”
Change
Request
Ref.
4752
rfo
3811
3954
4646
Version
6175G
Comments
Added note to “Description” on page 3
TC: added Figure 32-2 ”Clock Chaining Selection” page 393
SAM-BA Boot: Section 21.5.3 ”USB Device Port”reference to INF example and lit°6123 removed. (Doc
no longer available on web.)
UDP: Table 35-2, “USB Communication Flow”, Isochronous supported endpoint size is 64.
Errata: items added to the Errata Sections listed below.
Section 40.6 ”SAM7S256 Errata - Manufacturing Number 58818C”
Section 40.7 ”SAM7S256 Errata - Revision A Parts”
Section 40.11 ”SAM7S128 Errata - Manufacturing Number 58818C”
Section 40.12 ”SAM7S128 Errata - Revision A Parts”
Watchdog Timer:”The Watchdog Timer May Lock the Device in a Reset State”
Real-time Timer: “RTT_VR May be Corrupted”
Power Management Controller: “Slow Clock Selected in PMC and a Transition Occurs on PA1” and
“Programming CSS in PMC_MCKR Register”
Change
Request
Ref.
3442
3342
3647
3475
3652
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
759