SAM7S256_14 Datasheet, PDF (328/775 Pages) ATMEL Corporation – ARM-based Flash MCU

30.7.7 Read-write Flowcharts
The following flowcharts shown in Figure 30-14, Figure 30-15 on page 329, Figure 30-16 on page 330, Figure 30-
17 on page 331, Figure 30-18 on page 332 and Figure 30-19 on page 333 give examples for read and write opera-
tions. A polling or interrupt method can be used to check the status bits. The interrupt method requires that the
interrupt enable register (TWI_IER) be configured first.
Figure 30-14. TWI Write Operation with Single Data Byte without Internal Address
BEGIN
Set TWI clock
(CLDIV, CHDIV, CKDIV) in TWI_CWGR
(Needed only once)
Set the Control register:
- Master enable
TWI_CR = MSEN + SVDIS
Set the Master Mode register:
- Device slave address (DADR)
- Transfer direction bit
Write ==> bit MREAD = 0
Load Transmit register
TWI_THR = Data to send
Read Status register
No
TXRDY = 1?
Yes
Read Status register
No
TXCOMP = 1?
Yes
Transfer finished
SAM7S Series [DATASHEET]
6175M–ATARM–26-Oct-12
328