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SED1374 Datasheet, PDF (78/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller
Page 70
Epson Research and Development
Vancouver Design Center
9 Frame Rate Calculation
The following formulae are used to calculate the display frame rate.
TFT/MD-TFD and Passive Single-Panel modes
FrameRate = -------------------------------------f---P---C---L---K---------------------------------------
(HDP + HNDP) × (VDP + VNDP)
Where:
fPCLK
HDP
HNDP
VDP
VNDP
= PClk frequency (Hz)
= Horizontal Display Period = ((REG[04h] bits 6-0) + 1) x 8 Pixels
= Horizontal Non-Display Period = ((REG[08h] bits 4-0) + 4) x 8 Pixels
= Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7-0) + 1) Lines
= Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines
Passive Dual-Panel mode
FrameRate = ------------------------------------------f--P---C----L---K--------------------------------------------
2 × (HDP + HNDP) × V-----D2-----P-- + VNDP
Where:
fPCLK
HDP
HNDP
VDP
VNDP
= PClk frequency (Hz)
= Horizontal Display Period = ((REG[04h] bits 6-0) + 1) x 8 Pixels
= Horizontal Non-Display Period = ((REG[08h] bits 4-0) + 4) x 8 Pixels
= Vertical Display Period = ((REG[06h] bits 1-0, REG[05h] bits 7-0) + 1) Lines
= Vertical Non-Display Period = (REG[0Ah] bits 5-0) Lines
SED1374
X26A-A-001-02
Hardware Functional Specification
Issue Date: 99/04/29