SED1374 Datasheet, PDF (21/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Epson Research and Development
Vancouver Design Center
MC68000
BUS
A[23:16]
FC0, FC1, FC2
A[15:1]
D[15:0]
LDS#
UDS#
AS#
R/W#
DTACK#
CLK
RESET#
Decoder
.
Oscillator
CS#
AB[15:1]
DB[15:0]
AB0#
WE1#
BS#
RD/WR#
WAIT#
BCLK
RESET#
SED1374
FPDAT[3:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
Page 13
D[3:0]
FPSHIFT
FPFRAME
FPLINE
MOD
4-bit
LCD
Display
MC68030
BUS
A[31:16]
FC0, FC1, FC2
A[15:0]
D[31:16]
DS#
AS#
R/W#
SIZ1
SIZ0
DSACK1#
CLK
RESET#
Figure 3-3: Typical System Diagram (M68K #1 Bus)
.
Oscillator
Decoder
CS#
AB[15:0]
DB[15:0]
WE1#
BS#
RD/WR#
RD#
WE0#
WAIT#
BCLK
RESET#
SED1374
FPDAT[7:0]
FPSHIFT
FPFRAME
FPLINE
DRDY
LCDPWR
D[7:0]
FPSHIFT
FPFRAME
FPLINE
MOD
8-bit
LCD
Display
Figure 3-4: Typical System Diagram (M68K #2 Bus)
Hardware Functional Specification
Issue Date: 99/04/29
SED1374
X26A-A-001-02