SED1374 Datasheet, PDF (309/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Epson Research and Development
Vancouver Design Center
4 VR4102 to SED1374 Interface
Page 13
4.1 Hardware Description
The NEC VR4102 Microprocessor is specifically designed to support an external LCD
controller by providing the internal address decoding and control signals necessary. By
using the Generic # 2 interface, only one inverter is required to change the polarity of the
system reset signal to active low. A pull-up resistor is attached to WAIT# to speed up its
rise time when terminating a cycle.
The following diagram shows a typical implementation of the VR4102 to SED1374
interface.
NEC VR4102
WR#
SHB#
RD#
LCDCS#
LCDRDY
Pull-up
SED1374
WE0#
WE1#
RD#
CS#
WAIT#
RSTOUT
ADD[15:0]
DATA[15:0]
BUSCLK
RESET#
AB[15:0]
DB[15:0]
BUSCLK
Vcc
BS#
Vcc
RD/WR#
Figure 4-1: Typical Implementation of VR4102 to SED1374 Interface
Interfacing to the NEC VR4102™ Microprocessor
Issue Date: 99/01/05
SED1374
X26A-G-008-04