SED1374 Datasheet, PDF (136/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Page 40
Epson Research and Development
Vancouver Design Center
In return for using less power the default SwivelView imposes the restriction that the
SwivelView display width must be a power of two (e.g. 64, 128, 256, 512). The physical
display does not need to be a power of two wide. The difference can be treated as a virtual
width. In addition, scrolling in default SwivelView mode is restricted to two lines.
Alternate SwivelView mode requires more power as the internal clocks are run faster. In
return for a higher power consumption the "power of two" width-restriction is removed.
Also, the display can be scrolled one line at a time. One benefit to removing the power of
two width restriction is that panels which might not have been able to be used in
SwivelView mode due to a lack of memory may now be used.
Clocking for the SED1374 works as follows:
An external clock source supplies CLKI, the input clock. CLKI is routed through the Input
Clock Divide from Mode Register 1 (REG[02h] bit 4) and is either divided by two or passed
on. This signal is now the Operating Clock (CLK) from which PCLK and MCLK are
derived. In SwivelView mode the CLK signal may be divided down by 0, 2, 4, or 8 before
PCLK and MCLK are derived.
SwivelView mode offers additional clocking control over landscape mode. One reason for
the additional support is to maintain a register set that was backward compatible with
previous Epson LCD controllers.
When setting SwivelView mode, it is possible that the horizontal and vertical non-display
time must be recalculated as a result of PCLK changing in response to the SwivelView
mode selected or the clock selection method.
SED1374
X26A-G-002-02
Programming Notes and Examples
Issue Date: 99/04/27