SED1374 Datasheet, PDF (327/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Epson Research and Development
Vancouver Design Center
Page 13
4.2 SED1374 Hardware Configuration
The SED1374 uses CNF4 through CNF0 and BS# to allow selection of the bus mode and
other configuration data on the rising edge of RESET#. Refer to the SED1374 Hardware
Functional Specification, document number X26A-A-001-xx for details.
The tables below show only those configuration settings important to the PC Card host bus
interface.
Table 4-1: Summary of Power-On/Reset Options
Signal
CNF0
CNF1
CNF2
CNF3
CNF4
Low
High
See “Host Bus Selection” table below See “Host Bus Selection” table below
Little Endian
Active low LCDPWR signal
Big Endian
Active high LCDPWR signal
= configuration for PC Card host bus interface
CNF2
0
0
0
0
1
1
1
1
1
1
Table 4-2: Host Bus Interface Selection
CNF1
0
0
1
1
0
0
1
1
1
1
CNF0
0
1
0
1
0
1
0
0
1
1
BS#
Host Bus Interface
X
SH-4 bus interface
X
SH-3 bus interface
X
reserved
X
MC68K bus interface #1, 16-bit
X
reserved
X
MC68K bus interface #2, 16-bit
0
reserved
1
reserved
0
Generic #1, 16-bit
1
Generic #2, 16-bit
= configuration for PC Card host bus interface
Interfacing to the PC Card Bus
Issue Date: 98/12/10
SED1374
X26A-G-009-02