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SED1374 Datasheet, PDF (34/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller
Page 26
Epson Research and Development
Vancouver Design Center
7 A.C. Characteristics
Conditions: IO VDD = 3.3V ± 10% or IO VDD = 5V ± 10%
TA = -40° C to 85° C
Trise and Tfall for all inputs must be < 5 nsec (10% ~ 90%)
CL = 60pF (Bus/MPU Interface)
CL = 60pF (LCD Panel Interface)
7.1 Bus Interface Timing
7.1.1 SH-4 Interface Timing
CKIO
A[16:0]
RD/WR#
BS#
CSn#
WEn#
RD#
RDY#
D[15:0]
(write)
D[15:0]
(read)
TCKIO t2 t3
t4
t6 t7
t8
t9
t11
t14
Figure 7-1: SH-4 Timing
t5
t10
t12
t13
t15
t16
t17
VALID
Note
The SH-4 Wait State Control Register for the area in which the SED1374 resides must be set to a
non-zero value. The SH-4 read-to-write cycle transition must be set to a non-zero value (with ref-
erence to BUSCLK).
SED1374
X26A-A-001-02
Hardware Functional Specification
Issue Date: 99/04/29