SED1374 Datasheet, PDF (352/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Page 20
Epson Research and Development
Vancouver Design Center
4.5 Test Software
BR4
OR4
MemStart
address
RevCodeReg
ter
The test software to exercise this interface is very simple. It configures chip select 4 on the
MPC821 to map the SED1374 to an unused 64k byte block of address space and loads the
appropriate values into the option register for CS4. At that point the software runs in a tight
loop reading the 1374 Revision Code Register REG[00h], which allows monitoring of the
bus timing on a logic analyzer.
The source code for this test routine is as follows:
equ
$120
; CS4 base register
equ
$124
; CS4 option register
equ
$40
; upper word of SED1374 start
equ
FFE0
; address of Revision Code Regis-
Start
registers
enable
bits
clock;
mem space
Loop
mfspr
andis.
andis.
oris
ori
stw
andis.
oris
ori
stw
andis.
oris
lbz
b
r1,IMMR
; get base address of internal
r1,r1,$ffff
r2,r0,0
r2,r2,MemStart
r2,r2,$0801
; clear lower 16 bits to 0
; clear r2
; write base address
; port size 16 bits; select GPCM;
r2,BR4(r1)
r2,r0,0
r2,r2,$ffc0
; write value to base register
; clear r2
; address mask – use upper 10
r2,r2,$0708
; normal CS negation; delay CS ½
r2,OR4(r1)
r1,r0,0
r1,r1,MemStart
; inhibit burst
; write to option register
; clear r1
; point r1 to start of SED1374
r0,RevCodeReg(r1) ; read revision code into r1
Loop
; branch forever
end
SED1374
X26A-G-010-02
Interfacing to the Motorola MPC821 Microprocessor
Issue Date: 99/01/05