SED1374 Datasheet, PDF (36/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Page 28
Epson Research and Development
Vancouver Design Center
7.1.2 SH-3 Interface Timing
T_{CKIO t2 t3}
CKIO
A[16:0], M/R#
RD/WR#
BS#
CSn#
WEn#
RD#
WAIT#
D[15:0]
(write)
t4
t6 t7
t8
t9
t11
Hi-Z
t13
Hi-Z
D[15:0]
Hi-Z
(read)
t12
t15
VALID
Figure 7-2: SH-3 Bus Timing
t5
t10
Hi-Z
t14
Hi-Z
t16
Hi-Z
Note
The SH-3 Wait State Control Register for the area in which the SED1374 resides must
be set to a non-zero value.
SED1374
X26A-A-001-02
Hardware Functional Specification
Issue Date: 99/04/29