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SED1374 Datasheet, PDF (105/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller
Epson Research and Development
Vancouver Design Center
Page 9
Table 2-1: SED1374 Initialization Sequence (Continued)
Register
[12]
[13]
[14]
[15]
[16]
[17]
[18]
[19]
[1A]
[1B]
[1C]
[1E],[1F]
Value (hex)
0000 0000 (00)
1111 1111 (FF)
0000 0011 (03)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
0000 0000 (00)
Notes
Memory Address offset - not virtual setup so set to 0
Set the vertical size to the maximum value.
See Also
Split Screen on page 30
SetLUT control registers to 0 for this example.
Look-Up Table (LUT) on
page 14
GPIO control and status registers - set to “0”
Set the scratch pad bits to “0”.
We are not setting up SwivelView mode so set this register to “0”.
Line Byte Count is only required for SwivelView mode.
These registers are reserved and should not be written to.
2.1 Frame Rate Calculation
The system the SED1374 is being configured for dictates certain physical constraints such
as the width and height of the panel and the video system input clock.
The following are the formulae for determining the frame rate of a panel. The frame rate
for a single passive or TFT panel is calculated as follows:
FrameRate = (---H-----D----P-----+-----H-----N----D-----P-P---)-C--×--L---(-K--V----D-----P-----+-----V----N-----D-----P----)
for a dual passive panel the formula is:
FrameRate = ------------------------------------------P---C-----L----K-------------------------------------------
2 × (HDP + HNDP) × V-----D2-----P-- + VNDP
where: PCLK
HDP
HNDP
VDP
VNDP
= Pixel clock (in Hz)
= Horizontal Display Period (in pixels)
= Horizontal Non-Display Period (in pixels)
= Vertical Display Period (in lines)
= Vertical Non-Display Period (in lines)
To achieve the desired frame rate the HNDP and VNDP values can be manipulated. The
example below is a generic routine to calculate HNDP and VNDP from a desired frame
rate.
Programming Notes and Examples
Issue Date: 99/04/27
SED1374
X26A-G-002-02