SED1374 Datasheet, PDF (163/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Epson Research and Development
Vancouver Design Center
Page 67
**
Frame Rate = ---------------------------
**
(HDP + HNDP) * (VDP + VNDP)
*/
SET_REG(0x08, 0x1E);
/*
** Register 09h - FPFRAME Start Position - not used by STN
*/
SET_REG(0x09, 0x00);
/*
** Register 0Ah - Vertical Non-Display Register
**
- CAlculated in conjunction with register 08h (HNDP) to
**
achieve the desired frame rate.
*/
SET_REG(0x0A, 0x3B);
/*
** Register 0Bh - MOD Rate - not used by this panel
*/
SET_REG(0x0B, 0x00);
/*
** Register 0Ch - Screen 1 Start Word Address LSB
** Register 0Dh - Screen 1 Start Word Address MSB
**
- Start address should be set to 0
*/
SET_REG(0x0C, 0x00);
SET_REG(0x0D, 0x00);
/*
** Register 0Fh - Screen 2 Start Word Address LSB
** Register 10h - Screen 2 Start Word Address MSB
**
- Set this start address to 0 too
*/
SET_REG(0x0F, 0x00);
SET_REG(0x10, 0x00);
/*
** Register 12h - Memory Address Offset
**
- Used for setting memory to a width greater than the
**
display size. Usually set to 0 during initialization
**
and programmed to desired value later.
*/
SET_REG(0x12, 0x00);
/*
** Register 13h - Screen 1 Vertical Size LSB
** Register 14h - Screen 1 Vertical Size MSB
Programming Notes and Examples
Issue Date: 99/04/27
SED1374
X26A-G-002-02