SED1374 Datasheet, PDF (187/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Epson Research and Development
Vancouver Design Center
Page 9
• Format 2 – There are two data clocking formats in use by 8-bit color panels. The orig-
inal clocking scheme was designated to be format 1 and the newer scheme was desig-
nated format 2. Select this option for most 8 bit color panels. To date all color panels
smaller than 640x480 have been found to be format 2.
Setting this attribute incorrectly will result in a garbled display but will not damage the
panel. The display may appear “cut in half” or possibly horizontally skewed.
This option is STN specific and is disabled if TFT is selected. It is also disabled if the
panel type is selected to be 4-bit or monochrome.
• Frame Repeat – is a feature for EL panel support. EL panels use a frame of repeated
data as the cue to change their polarization. Without this change in polarization panel
quality deteriorates.
When Frame Repeat is selected an internal counter causes the periodic repeat of one
frame of modulated panel. At a frame rate of 72 Hz the repeat period is roughly one
hour. When not selected the modulated image is never consecutively repeated.
This option is STN specific and is disabled if TFT is selected.
• MOD Count – the mod count value specifies the number of FPLINEs between toggles
of the MOD output signal. When set to “0” (default) the MOD output signal toggles
every FPFRAME.
This field is for passive panels only and is generally only required for older mono-
chrome panels.
• FPLINE Start – this field specifies the delay, in an 8 pixel resolution, from the end of a
line of display data (FPDAT) to the leading edge of FPLINE.
This field is a TFT specific setting and is disabled if an STN panel is chosen.
• FPFRAME Start - this field specifies the number of lines between the last line of
display data (FPDAT) and the leading edge of FPFRAME.
This field is a TFT specific setting and is disabled if an STN panel is chosen.
• FPLINE / FPFRAME Polarity - these settings control the sync pulse direction of the
FPLINE and FPFRAME pulses in TFT modes.
Select the appropriate pulse direction for the panel being connected. Selecting 'Lo'
results in an active low sync pulse while 'Hi' results in an active high pulse.
These settings are TFT specific and are disabled when STN panel is selected. When
STN panel type is selected the pulse directions are preset to +ve, +ve.
1374CFG.EXE Configuration Program
Issue Date: 98/10/27
SED1374
X26A-B-001-01