SED1374 Datasheet, PDF (328/420 Pages) Epson Company – SED1374 Embedded Memory Color LCD Controller

Page 14
Epson Research and Development
Vancouver Design Center
4.3 PAL Equations
The PAL equations for the implementation presented in this document are as follows.
PAL device ‘16L8’;
OE
WE
CE1
CE2
REG
PCRESET
RESET
WE0
WE1
RD
RDWR
CS
PIN 1;
PIN 2;
PIN 3;
PIN 4;
PIN 5;
PIN 6;
PIN 14;
PIN 15;
PIN 16;
PIN 17;
PIN 18;
PIN 19;
equations
!WE0 = !WE & !CE1 & REG;
!WE1 = !WE & !CE2 & REG;
!CS = REG & (!RD # !RDWR # !WE0 # !WE1);
!RD = !OE & !CE1 & REG;
!RDWR = !OE & !CE2 & REG;
!RESET = PCRESET;
4.4 Register/Memory Mapping
The SED1374 is a memory mapped device. The SED1374 memory may be addressed
starting at 0000h, or on consecutive 64K byte blocks, and its internal registers are located
in the upper 32 bytes of the 64K byte block (i.e. REG[0] = FFE0h).
While the PC Card socket provides 64M bytes of address space, the SED1374 only needs
a 64K byte block of memory to accommodate its 40K byte display buffer and its 32 byte
register set. For this reason only address bits A[15:0] are used while A[25:16] are ignored.
Because the entire 64M bytes of memory is available, the SED1374’s memory and registers
will be aliased every 64K bytes for a total of 1024 times.
Note
If aliasing is not desirable, the upper addresses must be fully decoded.
SED1374
X26A-G-009-02
Interfacing to the PC Card Bus
Issue Date: 98/12/10