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SM320F2812-HT Datasheet, PDF (92/155 Pages) Texas Instruments – Digital Signal Processor
SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
2.4 V (VOH)
80%
20%
0.4 V (VOL)
Figure 6-5. Output Levels
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Output transition times are specified as follows:
• For a high-to-low transition, the level at which the output is said to be no longer high is below 80% of
the total voltage range and lower and the level at which the output is said to be low is 20% of the total
voltage range and lower.
• For a low-to-high transition, the level at which the output is said to be no longer low is 20% of the total
voltage range and higher and the level at which the output is said to be high is 80% of the total voltage
range and higher.
Figure 6-6 shows the input levels.
2.0 V (VIH)
90%
Figure 6-6. Input Levels
10%
0.8 V (VIL)
Input transition times are specified as follows:
• For a high-to-low transition on an input signal, the level at which the input is said to be no longer high
is 90% of the total voltage range and lower and the level at which the input is said to be low is 10% of
the total voltage range and lower.
• For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is
10% of the total voltage range and higher and the level at which the input is said to be high is 90% of
the total voltage range and higher.
NOTE
See the individual timing diagrams for levels used for testing timing parameters.
6.9 Timing Parameter Symbology
Timing parameter symbols used are created in accordance with JEDEC Standard 100. To shorten the
symbols, some of the pin names and other related terminology have been abbreviated as follows:
Lowercase subscripts and their meanings:
a
access time
Letters and symbols and their meanings:
H
High
c
cycle time (period)
d
delay time
L
Low
V
Valid
f
fall time
h
hold time
r
rise time
X
Unknown, changing, or don’t care level
Z
High impedance
su
setup time
t
transition time
v
valid time
w
pulse duration (width)
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Electrical Specifications
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