SM320F2812-HT Datasheet, PDF (8/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
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6-16 External ADC Start-of-Conversion – EVB – Switching Characteristics ................................................. 106
6-17 Interrupt Switching Characteristics ........................................................................................... 106
6-18 Interrupt Timing Requirements................................................................................................ 107
6-19 General-Purpose Output Switching Characteristics ........................................................................ 107
6-20 General-Purpose Input Timing Requirements .............................................................................. 108
6-21 SPI Master Mode External Timing (Clock Phase = 0) .................................................................... 109
6-22 SPI Master Mode External Timing (Clock Phase = 1) .................................................................... 111
6-23 SPI Slave Mode External Timing (Clock Phase = 0) ...................................................................... 113
6-24 SPI Slave Mode External Timing (Clock Phase = 1) ...................................................................... 115
6-25 Relationship Between Parameters Configured in XTIMING and Duration of Pulse ................................... 117
6-26 XTIMING Register Configuration Restrictions .............................................................................. 117
6-27 Valid and Invalid Timing ....................................................................................................... 117
6-28 XTIMING Register Configuration Restrictions .............................................................................. 118
6-29 Valid and Invalid Timing when using Synchronous XREADY ............................................................ 118
6-30 XTIMING Register Configuration Restrictions .............................................................................. 118
6-31 XTIMING Register Configuration Restrictions .............................................................................. 119
6-32 Asynchronous XREADY ...................................................................................................... 119
6-33 XINTF Clock Configurations................................................................................................... 119
6-34 External Memory Interface Read Switching Characteristics ............................................................. 122
6-35 External Memory Interface Read Timing Requirements .................................................................. 122
6-36 External Memory Interface Write Switching Characteristics .............................................................. 123
6-37 External Memory Interface Read Switching Characteristics (Ready-on-Read, 1 Wait State) ....................... 125
6-38 External Memory Interface Read Timing Requirements (Ready-on-Read, 1 Wait State) ............................ 125
6-39 Synchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ....................................... 125
6-40 Asynchronous XREADY Timing Requirements (Ready-on-Read, 1 Wait State) ...................................... 125
6-41 External Memory Interface Write Switching Characteristics (Ready-on-Write, 1 Wait State) ........................ 128
6-42 Synchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ....................................... 128
6-43 Asynchronous XREADY Timing Requirements (Ready-on-Write, 1 Wait State) ...................................... 128
6-44 XHOLD/XHOLDA Timing Requirements (XCLKOUT = XTIMCLK) ...................................................... 132
6-45 XHOLD/XHOLDA Timing Requirements (XCLKOUT = 1/2 XTIMCLK) ................................................. 133
6-46 DC Specifications .............................................................................................................. 135
6-47 AC Specifications .............................................................................................................. 136
6-48 Current Consumption .......................................................................................................... 136
6-49 ADC Power-Up Delays ........................................................................................................ 137
6-50 Sequential Sampling Mode Timing .......................................................................................... 139
6-51 Simultaneous Sampling Mode Timing ....................................................................................... 140
6-52 McBSP Timing Requirements ................................................................................................ 142
6-53 McBSP Switching Characteristics ........................................................................................... 143
6-54 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 0) ............................... 145
6-55 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 0) ........................... 145
6-56 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 0) ............................... 146
6-57 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 0) ........................... 146
6-58 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 10b, CLKXP = 1) ............................... 147
6-59 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 10b, CLKXP = 1) ........................... 147
6-60 McBSP as SPI Master or Slave Timing Requirements (CLKSTP = 11b, CLKXP = 1) ............................... 148
6-61 McBSP as SPI Master or Slave Switching Characteristics (CLKSTP = 11b, CLKXP = 1) ........................... 148
6-62 Flash Parameters at 150-MHz SYSCLKOUT .............................................................................. 149
6-63 Flash/OTP Access Timing .................................................................................................... 149
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