SM320F2812-HT Datasheet, PDF (106/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
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Table 6-15. External ADC Start-of-Conversion – EVA – Switching Characteristics^{(1) (2)}
PARAMETER
t_{d(XCOH-EVASOCL)}
tw(EVASOCL)
Delay time, XCLKOUT high to EVASOC low
Pulse duration, EVASOC low
(1) XCLKOUT = SYSCLKOUT
(2) Not production tested.
MIN
32 × t_c(HCO)
MAX
1 × t_c(SCO)
UNIT
cycle
ns
XCLKOUT
EVASOC
t_{d(XCOH-EVASOCL)}
t_w(EVASOCL)
Figure 6-18. EVASOC Timing
Table 6-16. External ADC Start-of-Conversion – EVB – Switching Characteristics^{(1) (2)}
PARAMETER
t_{d(XCOH-EVBSOCL)}
t_w(EVBSOCL)
Delay time, XCLKOUT high to EVBSOC low
Pulse duration, EVBSOC low
(1) XCLKOUT = SYSCLKOUT
(2) Not production tested.
MIN
32 × t_c(HCO)
MAX
1 × t_c(SCO)
UNIT
cycle
ns
XCLKOUT
EVBSOC
t_{d(XCOH-EVBSOCL)}
t_w(EVBSOCL)
Figure 6-19. EVBSOC Timing
6.16.2 Interrupt Timing
Table 6-17. Interrupt Switching Characteristics
t_d(PDP-PWM)HZ
PARAMETER
Delay time, PDPINTx low to PWM
high-impedance state
Without input
qualifier
With input qualifier
t_{d(TRIP-PWM)HZ} ⁽²⁾
Without input
Delay time, CxTRIP/TxCTRIP signals low _qualifier
to PWM high-impedance state
With input qualifier
t_d(INT) ⁽²⁾
Delay time, INT low/high to
interrupt-vector fetch
(1) Input Qualification Time (IQT) = [5 × QUALPRD × 2] × t_c(SCO)
(2) Not production tested.
MIN
t_qual + 12t_c(XCO)
MAX
12
1 × t_c(SCO) + IQT +
12 ⁽¹⁾
3 × t_c(SCO)
[2 × t_c(SCO)] + IQT⁽¹⁾
UNIT
ns
ns
ns
106 Electrical Specifications
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