SM320F2812-HT Datasheet, PDF (149/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
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SGUS062A – JUNE 2009 – REVISED APRIL 2010
6.31 Flash Timing
6.31.1 Recommended Operating Conditions⁽⁴⁾
MIN NOM MAX UNIT
N_f
N_OTP
Flash endurance for the array (Write/erase cycles)
Maximum One-Time Programmable (OTP) endurance for the array (Write
cycles)
0°C to 85°C
0°C to 85°C
100 1000
cycles
1 write
(4) Flash Timing Endurance is the minimum number of write/erase or write cycles specified over a programming temperature range of 0°C
to 85°C. Flash may be read over the operating temperature range of the device.
Table 6-62. Flash Parameters at 150-MHz SYSCLKOUT^{(1) (2)}
PARAMETER
MIN
Program
Time
16-Bit Word
8K Sector
16K Sector
Erase Time
8K Sector
16K Sector
I_DD3VFLP
V_DD3VFL current consumption during the Erase/Program cycle
Erase
Program
I_DDP
I_DDIOP
V_DD current consumption during Erase/Program cycle
V_DDIO current consumption during Erase/Program cycle
(1) Typical parameters as seen at room temperature using flash API V1 including function call overhead.
(2) Not production tested.
Table 6-63. Flash/OTP Access Timing^{(1) (2)}
TYP MAX UNIT
35
ms
170
ms
320
ms
10
s
11
s
75
mA
35
mA
140
mA
20
mA
PARAMETER
t_a(fp)
t_a(fr)
t_a(OTP)
Paged Flash access time
Random Flash access time
OTP access time
(1) For 150 MHz, PAGE WS = 5 and RANDOM WS = 5
For 135 MHz, PAGE WS = 4 and RANDOM WS = 4
(2) Not production tested.
MIN TYP MAX UNIT
36
ns
36
ns
60
ns
Table 6-64. Minimum Required Wait-States at Different Frequencies⁽¹⁾
SYSCLKOUT (MHz)
150
120
100
75
50
30
25
15
SYSCLKOUT (ns)
6.67
8.33
10
13.33
20
33.33
40
66.67
PAGE WAIT-STATE⁽²⁾
5
4
3
2
1
1
0
0
RANDOM WAIT STATE^{(2) (3)}
5
4
3
2
1
1
1
1
(1) Not production tested.
(2) Formulas to compute page wait state and random wait state:
(3) Random wait state must be greater than or equal to 1
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Electrical Specifications 149