SM320F2812-HT Datasheet, PDF (107/155 Pages) Texas Instruments – Digital Signal Processor

SM320F2812-HT
www.ti.com
SGUS062A – JUNE 2009 – REVISED APRIL 2010
Table 6-18. Interrupt Timing Requirements
t_w(INT) ⁽¹⁾
Pulse duration, INT input low/high
with no qualifier
with qualifier
t_w(PDP)
Pulse duration, PDPINTx input low
with no qualifier
with qualifier
t_w(CxTRIP) ⁽¹⁾
Pulse duration, CxTRIP input low
with no qualifier
with qualifier
t_w(TxCTRIP) ⁽¹⁾ Pulse duration, TxCTRIP input low
with no qualifier
with qualifier
(1) Not production tested.
(2) Input Qualification Time (IQT) = [5 × QUALPRD × 2] × t_c(SCO)
MIN
2 × t_c(SCO)
1 × t_c(SCO) + IQT ⁽²⁾
2 × t_c(SCO)
1 × t_c(SCO) + IQT ⁽²⁾
2 × t_c(SCO)
1 × t_c(SCO) + IQT ⁽²⁾
2 × t_c(SCO)
1 × t_c(SCO) + IQT ⁽²⁾
MAX UNIT
cycles
cycles
cycles
cycles
XCLKOUT
(see Note A)
TxCTRIP, CxTRIP,
PDPINTx
(see Note B)
PWM
(see Note C)
t_w(PDP), t_w(CxTRIP), t_w(TxCTRIP)
t_d(PDP-PWM)HZ , t_{d(TRIP-PWM)HZ}
XNMI, XINT1, XINT2
t_w(INT)
t_d(INT)
A0−A15
Interrupt Vector
A. XCLKOUT = SYSCLKOUT
B. TxCTRIP – T1CTRIP, T2CTRIP, T3CTRIP, T4CTRIP . CxTRIP – C1TRIP, C2TRIP, C3TRIP, C4TRIP, C5TRIP, or
C6TRIP. PDPINTx – PDPINTA or PDPINTB
C. PWM refers to all the PWM pins in the device (i.e., PWMn and TnPWM pins or PWM pin pair relevant to each
CxTRIP pin). The state of the PWM pins after PDPINTx is taken high depends on the state of the FCOMPOE bit.
Figure 6-20. External Interrupt Timing
6.17 General-Purpose Input/Output (GPIO) – Output Timing
Table 6-19. General-Purpose Output Switching Characteristics
PARAMETER
MIN
t_d(XCOH-GPO)
t_r(GPO) ⁽¹⁾
t_f(GPO) ⁽¹⁾
f_GPO ⁽¹⁾
Delay time, XCLKOUT high to GPIO low/high
Rise time, GPIO switching low to high
Fall time, GPIO switching high to low
Toggling frequency, GPO pins
All GPIOs
All GPIOs
All GPIOs
(1) Not production tested.
MAX
1 × t_c(SCO)
10
10
20
UNIT
cycle
ns
ns
MHz
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Electrical Specifications 107