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SM320F2812-HT Datasheet, PDF (86/155 Pages) Texas Instruments – Digital Signal Processor
SM320F2812-HT
SGUS062A – JUNE 2009 – REVISED APRIL 2010
www.ti.com
6.2 Recommended Operating Conditions
See (1)
MIN
VDDIO
VDD, VDD1
Device supply voltage, I/O
Device supply voltage, CPU
1.8 V (135 MHz)
1.9 V (150 MHz)
3.14
1.71
1.81
VSS
Supply ground
VDDA1, VDDA2,
AVDDREFBG, VDDAIO
ADC supply voltage
VDD3VFL
Flash programming supply
voltage
3.14
3.14
fSYSCLKOUT
VIH
VIL
Device clock frequency
(system clock)
High-level input voltage
Low-level input voltage
VDD = 1.9 V ± 5%
VDD = 1.8 V ± 5%
All inputs except XCLKIN
XCLKIN (at 50 mA max)
All inputs except XCLKIN
XCLKIN (at 50 mA max)
2
2
2
0.7VDD
High-level output source
All I/Os except Group 2
IOH
current,
VOH = 2.4 V
Group 2(2)
IOL
Low-level output sink current,
VOL = VOL MAX
All I/Os except Group 2
Group 2(2)
TA
Ambient temperature
–55
(1) See Section 6.7 for power sequencing of VDDIO, VDDAIO, VDD, VDDA1/VDDA2/AVDDREFBG, and VDD3VFL.
(2) Group 2 pins are as follows: XINTF pins, PDPINTA, TDO, XCLKOUT, XF, EMU0, and EMU1.
In Revision C, EVA (GPIOA0–GPIOA15) and GPIOD0 are 4 mA drive.
NOM
3.3
1.8
1.9
0
3.3
3.3
25
MAX
3.47
1.89
2
3.47
UNIT
V
V
V
V
3.47
150
135
VDDIO
VDD
0.8
0.3VDD
–4
–8
4
8
220
V
MHz
V
V
mA
mA
°C
6.3 Electrical Characteristics
Over recommended operating conditions (unless otherwise noted) (1)
PARAMETER
TEST CONDITIONS
MIN
TYP
MAX
UNIT
VOH High-level output voltage
IOH = IOHMAX
IOH = 50 mA
2.4
VDDIO
V
– 0.2
VOL Low-level output voltage
Input
With pullup
IIL
current
(low level)
With pulldown
Input
With pullup
IIH
current
(high
With pulldown(3)
level)
IOL = IOLMAX
VDDIO = 3.3 V,
VIN = 0 V
All I/Os(2) (including XRS)
except EVB
GPIOB/EVB
VDDIO = 3.3 V, VIN = 0 V
VDDIO = 3.3 V, VIN = VDD
VDDIO = 3.3 V,
VIN = VDD
–80 –140
–13
–25
28
50
0.4 V
–190
–35 mA
±2
±2
mA
80
IOZ
Output current,
high-impedance state (off-state)
VO = VDDIO or 0 V
±2 mA
CI
Input capacitance
Co
Output capacitance
7
pF
7
pF
(1) Minimum and maximum parameters are characterized for operation at TA = 220°C unless otherwise noted, but may not be production
tested at that temperature. Production test limits with statistical guardbands are used to ensure high temperature performance.
(2) The following pins have no internal PU/PD: GPIOE0, GPIOE1, GPIOF0, GPIOF1, GPIOF2, GPIOF3, GPIOF12, GPIOG4, and GPIOG5.
(3) The following pins have an internal pulldown: XMP/MC, TESTSEL, and TRST.
86
Electrical Specifications
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